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 Freescale Semiconductor Data Sheet: Product Preview
Document Number: MC33493A Rev. 2, 07/2007
MC33493A
PLL Tuned UHF Transmitter for Data Transfer Applications
* * * * * * * * * * * Selectable frequency bands: 315--434 MHz and 868--928 MHz On Off Keying (OOK) and Frequency Shift Keying (FSK) modulation Adjustable output power range Fully integrated voltage control regulator (VCO) Supply voltage range: 1.9--3.6 V Very low standby current: 0.1 nA @ TA= 25 C Low-supply voltage shutdown Data clock output for microcontroller Extended temperature range: -20 to 85 C Low external component count Typical application compliant with European Telecommunications Standards Institute (ETSI) standard
PIN CONNECTIONS
DATACLK DATA BAND GND XTAL1 XTAL0 REXT
1 2 3 4 5 6 7
14 13 12 11 10 9 8
MODE ENABLE VCC GNDRF RFOUT VCC CFSK
Ordering Information
Ambient Temperature Range
Device
Package
MC33493ADTB
-20C to 85C TSSOP14
MC3493ADTBE -20C to 85C TSSOP14 (ROHS)
This document contains information on a product under development. Freescale reserves the right to change or discontinue this product without notice. (c) Freescale Semiconductor, Inc., 2007. All rights reserved.
Table of Contents
Transmitter Functional Description . . . . . . . . . . . . . . . . . . . . . .4 Phase Locked Loop and Local Oscillator . . . . . . . . . . . . . . . . .4 RF Output Stage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 Modulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 Microcontroller Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 State Machine. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 Power Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 Data Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 Radio Frequency (RF) Output Spectrum . . . . . . . . . . . . . . . .11 Output Power Measurement . . . . . . . . . . . . . . . . . . . . . . . . . .14 Complete Application Schematic and PCB for OOK Modulation . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 13 Complete Application Schematic and PCB for FSK Modulation. . . . . . . . . . . . . . . . . . . . . . . . . . . . .17 14 Recommendations for FSK Modulation . . . . . . . . . . . . . . . . .19 15 Case Outline Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . .21 1 2 3 4 5 6 7 8 9 10 11 12 Figure 9. Output Power Measurement Configurations . . . . . . . . Figure 10.Output Model and Matching Network for 434 MHz Band . . . . . . . . . . . . . . . . . . . . . . . . . . . . Figure 11.Output Power at 434 MHz Band vs Rext Value . . . . . Figure 12.Application Schematic for OOK Modulation, 434 MHz Frequency Band . . . . . . . . . . . . . . . . . . . . . . Figure 13.Two-Button Keyfob Board Layout . . . . . . . . . . . . . . . . Figure 14.Application Schematic for FSK Modulation, Serial Configuration, 434 MHz Frequency Band . . . . . Figure 15.Application PCB Layout for FSK Modulation, Serial Configuration, 434 MHz Frequency Band . . . . . Figure 16.Crystal Load Capacitance Contributors Schematic . . Figure 17.Case Outline Dimensions . . . . . . . . . . . . . . . . . . . . . 13 13 14 15 16 17 18 19 20
List of Tables
Pin Function Description . . . . . . . . . . . . . . . . . . . . . . . . 3 Absolute Maximum Ratings. . . . . . . . . . . . . . . . . . . . . . 3 Band Selection and Associated Divider Ratios . . . . . . . 4 DATACLK Frequency vs Crystal Oscillator Frequency. . 5 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 8 External Components Description for OOK. . . . . . . . . 15 Typical Crystal Characteristics (SMD Package) . . . . . 16 External Components Description for FSK . . . . . . . . . 17 Crystal Pulling Capacitor Values vs Carrier Frequency Total Deviation -1- . . . . . . . . . . . . . 18 Table 10.Crystal Pulling Capacitor Values vs Carrier Frequency Total Deviation -2- . . . . . . . . . . . . . 18 Table 11.Pads and Tracks Parasitic Values . . . . . . . . . . . . . . . . 19 Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9.
List of Figures
Figure 1. Simplified Block Diagram . . . . . . . . . . . . . . . . . . . . . . . 3 Figure 2. Crystal Pulling Configurations. . . . . . . . . . . . . . . . . . . . 5 Figure 3. State machine . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 4. Signals Waveform and Timing Definition . . . . . . . . . . . 7 Figure 5. RF Spectrum at 434 MHz Frequency Band Displayed with a 5 MHz Span . . . . . . . . . . . . . . . . . . . 11 Figure 6. RF Spectrum at 434 MHz Frequency Band Displayed with a 50 MHz Span . . . . . . . . . . . . . . . . . . 11 Figure 7. RF Spectrum at 434 MHz Frequency Band Displayed with a 1.5 GHz Span . . . . . . . . . . . . . . . . . 12 Figure 8. RF Spectrum at 434 MHz Band for a 70 kHz FSK Deviation at 4.8 kbit/s . . . . . . . . . . . 12
PLL Tuned UHF Transmitter for Data Transfer Applications, Rev. 2 2 Freescale Semiconductor
Figure 1. Simplified Block Diagram Table 1. Pin Function Description
Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Name DATACLK DATA BAND GND XTAL1 XTAL0 REXT CFSK VCC RFOUT GNDRF VCC ENABLE MODE Description Clock output to the microcontroller Data input Frequency band selection Ground Reference oscillator input Reference oscillator output Power amplifier output current setting input FSK switch output Power supply Power amplifier output Power amplifier ground Power supply Enable input Modulation type selection input
Table 2. Absolute Maximum Ratings
Parameter Supply voltage Voltage allowed on each pin ESD HBM voltage capability on each pin 1(note 1) ESD MM voltage capability on each pin (note 2) Storage temperature Junction temperature
1 2 2
Symbol VCC
Value VGND - 0.3 to 3.7 VGND - 0.3 to VCC + 0.3 2000 150
Unit V V V V C C
Ts Tj
-65 to +150 +150
Human Body model, AEC-Q100-002 Rev. C. Machine Model, AEC-Q100-003 Rev. E.
PLL Tuned UHF Transmitter for Data Transfer Applications, Rev. 2 Freescale Semiconductor 3
Transmitter Functional Description
1
Transmitter Functional Description
MC33493A is a PLL-tuned low-power UHF transmitter. The different modes of operation are controlled by the microcontroller through several digital input pins. The power supply voltage ranges from 1.9 V to 3.6 V, allowing operation with a single lithium cell.
2
Phase Locked Loop and Local Oscillator
The VCO is a completely integrated relaxation oscillator. The phase frequency detector (PFD) and the loop filter are fully integrated. The exact output frequency is equal to: fRFOUT = fXTAL x [PLL divider ratio]. The frequency band of operation is selected through the BAND pin. Table 3 shows details for each frequency band selection. Table 3. Band Selection and Associated Divider Ratios
BAND Input Level High Low Frequency Band (MHz) 315 434 868 PLL Divider Ratio 32 64 Crystal Oscillator Frequency (MHz) 9.84 13.56
An out-of-lock function is performed by monitoring the PFD output voltage. When it exceeds defined limits, the RF output stage is disabled.
3
Radio Frequency (RF) Output Stage
The radio frequentcy (RF) output stage source is a single-ended square-wave switched current. Harmonics are present in the output current drive. Their radiated absolute level depends on the antenna characteristics and output power. Typical application demonstrates compliance to ETSI standard. A resistor, Rext, connected to the REXT pin controls the output power allowing a trade-off between radiated power and current consumption. The output voltage is internally clamped to Vcc 2 Vbe (typ. Vcc 1.5 V @ TA=25 C).
4
Modulation
DATA = 0 output stage off, DATA = 1 output stage on.
To select the On Off Keying (OOK) modulation, a low-logic level must be applied on the MODE pin. This modulation is performed by switching the RF output stage on or off. The logic level applied on the DATA pin controls the output stage state:
Applying a high-logic level on the MODE pin selects Frequency Shift Keying (FSK) modulation. This modulation is achieved by crystal pulling. An internal switch connected to the CFSK pin enables switching the external crystal load capacitors. Figure 2 shows the possible configurations: serial and parallel. The logic level applied on pin DATA controls the state of this internal switch: DATA=0 switch off, DATA=1 switch on. DATA input is internally re-synchronized by the crystal reference signal. The corresponding jitter on the data duty cycle cannot exceed 1 reference period (75 ns for a 13.56 MHz crystal). This crystal pulling solution implies that the RF output frequency deviation equals the crystal frequency deviation multiplied by the PLL Divider ratio (see Table 3).
PLL Tuned UHF Transmitter for Data Transfer Applications, Rev. 2 4 Freescale Semiconductor
Microcontroller Interface
Figure 2. Crystal Pulling Configurations
5
Microcontroller Interface
Four digital input pins (ENABLE, DATA, BAND, and MODE) enable the circuit to be controlled by a microcontroller. The band frequency and the modulation type should be configured before enabling the circuit. One digital output pin, DATACLK, provides the microcontroller with a reference frequency for data clocking. This frequency is equal to the crystal oscillator frequency divided by 64 (see Table 4). Table 4. DATACLK Frequency vs Crystal Oscillator Frequency
Crystal Oscillator Frequency (MHz) 9.84 13.56 DATACLK Frequency (kHz) 154 212
PLL Tuned UHF Transmitter for Data Transfer Applications, Rev. 2 Freescale Semiconductor 5
State Machine
6
State Machine
Power ON AND ENABLE=0
Figure 3 details the state machine.
State 1 Standby mode
ENABLE=0
ENABLE=1
ENABLE=0
State 2 PLL out of lock-in range No RF output
State 4 Shutdown mode
PLL in lock-in range
PLL out of lock-in range
Vbattery < Vshutdown
State 3 Transmission mode
Figure 3. State machine State 1: The circuit is in standby mode and draws only a leakage current from the power supply. State 2: In this state, the PLL is out of the lock-in range; therefore, the RF output stage is switched off, preventing RF transmission. Data clock is available on the DATACLK pin. Each time the device is enabled, the state machine passes through this state. State 3: In this state, the PLL is within the lock-in range. If t < tPLL_lock_in, the PLL may be in acquisition mode. If ttPLL_lock_in, then the PLL is locked. Data entered on the DATA pin are output on the RFOUT pin according to the modulation selected by the level applied on the MODE pin. State 4: When the supply voltage falls below the shutdown voltage threshold (VSDWN,) the entire circuit switches off. After this shutdown, applying a low level on the ENABLE pin unlatches the circuit. Figure 4 shows the waveforms of the main signals for a typical application cycle.
PLL Tuned UHF Transmitter for Data Transfer Applications, Rev. 2 6 Freescale Semiconductor
Power Management
ENABLE DATACLK tDATACLK_settling > tPLL_lock_in tPLL_lock_in DATA
MODE=0 (OOK)
RFOUT fcarrier fhigh State 1 State 2 flow fhigh State 3 fcarrier flow fhigh State 1
MODE=1 (FSK)
: PLL locked Figure 4. Signals Waveform and Timing Definition
7
Power Management
When the battery voltage falls below the shutdown voltage threshold (VSDWN) the entire circuit switches off. After this shutdown, the circuit is latched until a low level is applied on pin ENABLE (see State 4 of the state machine).
8
Data Clock
At start-up, data clock timing is valid after the data clock settling time. Because the clock is switched off asynchronously, the last period duration cannot be guaranteed.
9
Electrical Characteristics
Unless otherwise specified, voltage range Vcc=[Vshutdown;3.6 V], temperature range TA=[-20 C;+ 85 C], Rext=12 k 5%, RF output frequency fcarrier = 433.92 MHz, reference frequency freference = 13.560 MHz, output load RL = 50 1% (Figure 9). Values refer to the circuit shown in the recommended application schematics: Figure 12 shows OOK modulation and Figure 14 shows FSK modulation. Typical values reflect average measurement at VCC =3 V, TA = 25 C.
PLL Tuned UHF Transmitter for Data Transfer Applications, Rev. 2 Freescale Semiconductor 7
Electrical Characteristics
Table 5. Electrical Characteristics
Limits Parameter Test Conditions, Comments Min. Typ. Max. General Parameters TA 25 C Supply current in standby mode TA = 60 C TA = 85 C 315 and 434 bands, OOK and FSK modulation, continuous wave, TA = 25 C 315 and 434 bands, DATA=0, -20 C TA 85 C Supply current in transmission mode 868 MHz band, DATA=0, -20 C TA 85 C 315 and 434 bands, OOK and FSK modulation, continuous wave, -20 C TA 85 C 868 MHz band, OOK and FSK modulation, continuous wave, -20 C T A 85 C Supply voltage TA = -20 C Shutdown voltage threshold TA = 25 C TA = 60 C TA = 85 C RF Parameters Rext value 315 and 434 MHz bands, with 50 matching network 868 MHz band, with 50 matching network 315 and 434 MHz bands, -20 C TA 85 C 868 MHz band, -20 C TA 85 C Current and output power variation vs. Rext value 315 and 434 MHz bands, with 50 matching network 315 and 434 MHz bands, with 50 matching network Harmonic 2 level 868 MHz band, with 50 matching network 315 and 434 MHz bands 868 MHz band 12 -- -- -2.5 -6 -- -- -- -- -- -- 5 1 0 -3 -0.35 -0.25 -34 -49 -23 -38 21 -- -- 2.5 0 -- -- -- -17 -27 k dBm dBm dBm dBm dB/k mA/k dBc dBc dBc dBc -- -- -- -- 0.1 7 40 11.6 5 30 150 13.5 nA nA nA mA Unit
1 1.1 1.2 1.3 1.7 1.5 1.6 1.8
-- -- --
4.4 4.6 11.6
5.5 5.7 14.4
mA mA mA
--
11.8
14.6
mA
1.9 1.10 1.12 1.13 1.14 1.15 2 2.1 2.2 2.3
Output power
-- -- -- -- --
3 1.99 1.86 1.76 1.68
3.6 2.06 1.95 1.84 1.78
V V V V V
2.4 2.8 2.12 2.13 2.14 2.15 2.16
PLL Tuned UHF Transmitter for Data Transfer Applications, Rev. 2 8 Freescale Semiconductor
Electrical Characteristics
Table 5. Electrical Characteristics (continued)
Limits Parameter Test Conditions, Comments Min. Typ. -32 -57 -21 -48 -36 -29 -37 -44 -37 -62 -80 -45 -75 -73 400 1 20 20 75 315 and 434 MHz bands, see note 868 MHz band, see note MODE = 0, DATA = x MODE = 1, DATA = 0 MODE = 1, DATA = 1 CFSK output capacitance Data rate falling and rising edges, tdelay_difference Manchester coding MODE = 0, see note MODE = 1, see note -- -- 50 -- -- -- 3.5 -200 90 -- -- 70 90 1 -- 5.25 -- Max. -- -- -15 -39 -24 -17 -30 -34 -27 -53 -60 -39 -68 -66 1600 -- 200 50 -- 100 200 -- 300 -- 10 7.5 200 dBc kHz kHz k pF kbit/s s ns dBc dBc dBc dBc dBc dBc dBc dBc dBc dBc dBc dBc dBc/Hz dBc/Hz s pF 315 and 434 MHz bands, with 50 matching network Harmonic 3 level 868 MHz band, with 50 matching network 315 and 434 MHz bands 868 MHz band Spurious level @ fcarrier f DATACLK Spurious level @ fcarrier f reference 315 and 434 MHz bands 868 MHz band 315 MHz band 434 MHz band 868 MHz band Spurious level @ fcarrier/2 315 MHz band 434 MHz band 868 MHz band Phase noise 315 and 434 MHz bands, 175 kHz from f carrier 868 MHz band, 175 kHz from f carrier PLL lock-in time, tPLL_lock_in XTAL1 input capacitance Crystal resistance OOK modulation FSK modulation OOK modulation depth FSK modulation carrier frequency total deviation CFSK output resistance fcarrier within 30 kHz from the final value, crystal series resistor = 150 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- Unit
2.17 2.18 2.19 2.20 2.21 2.22 2.23 2.24 2.25 2.41 2.26 2.27 2.30 2.31 2.32 2.33 2.34 2.44 2.35 2.36 2.37 2.38 2.39 2.43 2.40
2.41 Data to RF delay difference between 2.42
PLL Tuned UHF Transmitter for Data Transfer Applications, Rev. 2 Freescale Semiconductor 9
RF Output Spectrum
Table 5. Electrical Characteristics (continued)
Limits Parameter Test Conditions, Comments Min. Typ. Max. Unit
Note: This parameter depends on crystal characteristics, load capacitor values (see Table 4) and PCB track capacitance. Note: Delay difference definition
Input data Demodulated data tdelay_rise tdelay_fall
From 50% of data edge to corresponding demodulated signal envelope edge: tdelay_difference = tdelay_fall - tdelay_rise
3 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 3.10
Input low voltage Input high voltage Input hysteresis voltage Input current ENABLE pulldown resistor DATACLK output low voltage DATACLK output high voltage DATACLK rising time DATACLK falling time DATACLK settling time, tDATACLK_settling
Microcontroller Interfaces 0 0.7 x VCC -- Pins: BAND, MODE, DATA = 1 -- -- 0 Cload = 2 pF Cload = 2 pF, measured from 20% to 80% of the voltage swing 45% < duty cycle fDATACLK < 55% 0.75 x VCC -- -- -- -- -- -- -- 180 -- -- 250 150 800 0.3 x VCC VCC 120 100 -- 0.25 x VCC VCC 500 400 2000 V V mV nA k V V ns ns s
Pins: BAND, MODE, ENABLE, and DATA
10
RF Output Spectrum
The following figures represent spectrums of the transmitter carrier, measured in conduction mode. Three different spans have been used. The 5 MHz span spectrum (Figure 5) shows phase noise response close to the RF carrier and the noise suppression within the PLL-loop bandwidth. The 50 MHz span spectrum (Figure 6) shows phase noise and reference spurious. Finally, the 1.5 GHz span spectrum (Figure 7) shows the second and third harmonics of carrier. All spectrums are measured in OOK modulation at DATA=1. Figure 8 shows the spectrum in case of FSK modulation with 45 kHz deviation at 4 kbit/s data rate.
PLL Tuned UHF Transmitter for Data Transfer Applications, Rev. 2 10 Freescale Semiconductor
RF Output Spectrum
Resolution bandwidth: 100kHz Resolution bandwidth: 30kHz
Figure 5. RF Spectrum at 434 MHz Frequency Band Displayed with a 5 MHz Span
Figure 6. RF Spectrum at 434 MHz Frequency Band Displayed with a 50 MHz Span
PLL Tuned UHF Transmitter for Data Transfer Applications, Rev. 2 Freescale Semiconductor 11
RF Output Spectrum
Figure 7. RF Spectrum at 434 MHz Frequency Band Displayed with a 1.5 GHz Span
Figure 8. RF Spectrum at 434 MHz Band for a 70 kHz FSK Deviation at 4.8 kbit/s
PLL Tuned UHF Transmitter for Data Transfer Applications, Rev. 2 12 Freescale Semiconductor
Output Power Measurement
11
Output Power Measurement
The RF output levels given in Section 9, "Electrical Characteristics," are measured with a 50 load directly connected to the RFOUT pin, as shown below in Figure 9. This wideband coupling method gives results independent of the application.
VCC Impeder: TDK MMZ1608Y102CTA00 RFOUT 100 pF RL= 50 W RF output
Figure 9. Output Power Measurement Configurations The configuration shown in Figure 10(a) provides better efficiency in terms of output power and harmonics rejection. The schematic on Figure 10(b) gives the equivalent circuit of the RFOUT pin and the DC bias impeder as well as matching network components for 434 MHz frequency band.
VCC Impeder: TDK MMZ1608Y102CTA00 RFOUT
(a)
Matching Network
RF output
RL=50 Matching Network
(b)
L1 39 nH
3 k
C3 330pF
50
C0 1.5 pF
R0 250
Ri Impeder
RL Load
RFOUT pin
Figure 10. Output Model and Matching Network for 434 MHz Band
PLL Tuned UHF Transmitter for Data Transfer Applications, Rev. 2 Freescale Semiconductor 13
Complete Application Schematic and PCB for OOK Modulation
Figure 11 shows the output power versus the Rext resistor value with 50 load and with matching network.
Output power measurement in typical conditions (434MHz - Vcc=3V - 25C)
REXT SPECIFIED RANGE
8
6
Output power when matched (dBm) -0.35dB/k # -0.35mA/k
4
2 RFOUT Level (dBm) 0
-2
-4
Output power on 50 load (dBm)
-6 6 9 12 15 Rext (k) 18 21 24
Figure 11. Output Power at 434 MHz Band vs Rext Value The 50 matching network used for the 868 MHz band is similar to the 434 MHz, excepting components values: L1 is changed to 8.2 nH and C3 to 470 pF in Figure 11. The typical gain of this 868 MHz matching network is 4 dB compared to unmatched configuration.
12
Complete Application Schematic and PCB for OOK Modulation
Figure 12 shows a complete application schematic using a MC68HC908RK2 microcontroller. OOK modulation is selected, fcarrier = 433.92 MHz. The C2 to C5 capacitors can be removed if switch debounce is done by software.
PLL Tuned UHF Transmitter for Data Transfer Applications, Rev. 2 14 Freescale Semiconductor
Complete Application Schematic and PCB for OOK Modulation
Vbat Vbat LED1
SW1
SW1a
SW2
SW2a
For 868 MHz band application, the input pin BAND must be wired to ground. See component description on Table 6 and Table 7. Table 6. External Components Description for OOK
Component Y1 Function Crystal, see Table 7 RF output level setting resistor (Rext) Crystal load capacitor Power supply decoupling capacitors Value 315 MHz band: 9.84 434 MHz band: 13.56 868 MHz band: 13.56 12 8.21 22 100 Unit MHz MHz MHz k pF nF pF
Examples of crystal reference are given below (see characteristics in Table 7) for different application bands: * * at 315 MHz band (freference = 9.84375 MHz, -40 C < TA < 85 C): NDK LN-G102-950, at 434/868 MHz bands (freference = 13.56 MHz, -40 C < TA < 125 C): NDK NX8045GB/CSJ S1-40125-8050-12 and NDK NX1255GA.
Freescale Semiconductor
1
B1 R1 750 2.2nF 2.2nF 2.2nF 2.2nF Vbat U1 1 2 3 U2 1 2 3 4 5 6 7 8 9 10 PTA0 PTB0/MCLK PTB1 PTB2/TCH0 PTB4/TCH1 PTB5 PTB3/TCLK OSC1 OSC2 VSS MC68HC908RK2 PTA1/KBD1 PTA2/KBD2 PTA3/KBD3 PTA4/KBD4 PTA5/KBD5 PTA6/KBD6 PTA7 RST IRQ1 VDD 20 19 18 17 16 15 14 13 12 11 Vbat C10 100nF 13.56MHz 7 R2 12K C6 8.2pF Y1 6 4 5 DATACLK DATA BAND GND XTAL1 XTAL0 REXT MC33493 MODE ENABLE VCC GNDRF RFOUT VCC CFSK 14 13 12 11 10 9 8 C8 100pF C9 2.2pF C7 22nF C2 C3 C4 C5
2
Figure 12. Application Schematic for OOK Modulation, 434 MHz Frequency Band
R2 C6 C7 C8
1
C6 value equals recommended crystal load capacitance reduced by the PCB stray capacitances.
PLL Tuned UHF Transmitter for Data Transfer Applications, Rev. 2 15
Complete Application Schematic and PCB for FSK Modulation
)
Table 7. Typical Crystal Characteristics (SMD Package)
Parameter Load capacitance Motional capacitance Static capacitance Loss resistance NDK LN-G102-950 (for 315 MHz) 12 3.33 1.05 28 NDK NX8045GB/CSJ NDK NX1255GA S1-40125-8050-12 (for 434 MHz and 868 MHz) (for 434 MHz and 868 MHz) 12 4.4 1.5 18.5 12 10.5 2.46 10 Unit pF fF pF
Figure 13 shows a two-button keyfob board. Size is 30 x 45 millimeters.
Figure 13. Two-Button Keyfob Board Layout
13
Complete Application Schematic and PCB for FSK Modulation
Figure 14 shows a complete application schematic using a MC68HC908RK2 microcontroller. FSK modulation is selected, fcarrier= 433.92 MHz. C1 capacitor can be removed if switch debounce is done by software.
PLL Tuned UHF Transmitter for Data Transfer Applications, Rev. 2 16 Freescale Semiconductor
Complete Application Schematic and PCB for FSK Modulation
Figure 14. Application Schematic for FSK Modulation, Serial Configuration, 434 MHz Frequency Band For 868 MHz band application, the input pin BAND must be wired to ground. See component description in Table 8. Table 8. External Components Description for FSK Component
Y1
Function
Crystal
Value
315 MHz band: 9.84, See Table 7 434 MHz band: 13.56, see Table 7 868 MHz band: 13.56, see Table 7
Unit
MHz MHz MHz k pF pF
R1 C3 C4 C2 C6
RF output level setting resistor (Rext) Crystal load capacitor
12 See Table 9
Power supply decoupling capacitor
22 100
nF pF
Figure 15 shows the corresponding PCB layout.
PLL Tuned UHF Transmitter for Data Transfer Applications, Rev. 2 Freescale Semiconductor 17
Recommendations for FSK Modulation
Figure 15. Application PCB Layout for FSK Modulation, Serial Configuration, 434 MHz Frequency Band Table 9 gives the measured FSK deviations respective to C3 and C4 capacitor values for three deviations. Crystal reference is NDK NX8045GB/CSJ S1-40125-8050-12. Table 9. Crystal Pulling Capacitor Values vs Carrier Frequency Total Deviation -1Carrier frequency (MHz) 434 Carrier frequency total deviation (kHz) 45 70 100 868 90 140 200 C3 capacitor (pF) 4.7 2.2 1 4.7 2.2 1 C4 capacitor (pF) 6.8 10 15 6.8 10 15 Recommended R_off value (k) 10 -- 22 10 -- 22
Another crystal reference, NDK NX1255GA (see Table 7), is enabled to reach higher deviation as mentioned on Table 10. These results are due to the higher crystal motional capacitor. Table 10. Crystal Pulling Capacitor Values vs Carrier Frequency Total Deviation -2Carrier frequency (MHz) 434 868 Carrier frequency total deviation (kHz) 150 300 C3 capacitor value (pF) 1 1 C4 capacitor value (pF) 27 27 Recommended R_off value (k) -- --
14
* * * *
Recommendations for FSK Modulation
the crystal characteristic, especially its static capacitance the external load capacitors (C3, C4 as defined in Figure 14 and Table 9) the device internal capacitance of pins XTAL0, XTAL1, CFSK the PCB track capacitance
FSK deviation is function of total load capacitance presented to the crystal. This load capacitance is constituted by various contributors:
The schematic given in Figure 16 shows a typical FSK application using serial capacitor configuration, where device pads and PCB track capacitances are mentioned.
PLL Tuned UHF Transmitter for Data Transfer Applications, Rev. 2 18 Freescale Semiconductor
Recommendations for FSK Modulation
Device pad capacitance is defined by the package capacitance and by the internal circuitry. Typical capacitance values for these pads are given in Table 11. Some realistic assumptions and measurements have been made concerning track parasitic capacitances for a 0.8 mm FR4 double side application PCB. They are given in Table 11 and the corresponding PCB layout is shown in figure Figure 17. To achieve large deviations, this total load capacitance must be lowered. For a given crystal, the PCB must be carefully laid out to reduce the capacitance of the tracks wired to XTAL0, XTAL1, and CFSK pins. Recommendation: a R_off resistor can be added in parallel with the FSK switch to optimize the transient response of demodulated signal. Table 11 gives the optimized R_off values for two deviations. There is no footprint for R_off resistor on the layout in Figure 16. When used, this component can be soldered on top of C3.
Figure 16. Crystal Load Capacitance Contributors Schematic Table 11. Pads and Tracks Parasitic Values
Capacitance C_pad_XTAL0 C_pad_XTAL1 C_pad_CFSK C_track_XTAL0 C_track_XTAL1 C_track_CFSK Value 1 1 1 1.5 1.5 1.5 Unit pF pF pF pF pF pF
PLL Tuned UHF Transmitter for Data Transfer Applications, Rev. 2 Freescale Semiconductor 19
Case Outline Dimensions
15
Case Outline Dimensions
14X K REF
M 0.10 (0.004) T U S V S 0.15 (0.006)T U S N
2X
L/2
14
8
0.25 (0.010) M
L
PIN 1 IDENT. 1 7
B -U-
N F DETAIL E K K1 J J1 SECTION N-N -W-
0.15 (0.006)T U S
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DIM A B C D F G H J J1 K K1 L M MILLIMETERS MIN MAX 4.90 5.10 4.30 4.50 -- 1.20 0.05 0.15 0.50 0.75 0.65 BSC 0.50 0.60 0.09 0.20 0.09 0.16 0.19 0.30 0.19 0.25 6.40 BSC 0 8 INCHES MIN MAX 0.193 0.200 0.169 0.177 -- 0.047 0.002 0.006 0.020 0.030 0.026 BSC 0.020 0.024 0.004 0.008 0.004 0.006 0.007 0.012 0.007 0.010 0.252 BSC 0 8
A -V-
C 0.10 (0.004) -T- SEATING D PLANE
G
H
DETAIL E
CASE 948G-01 ISSUE O Figure 17. Case Outline Dimensions
PLL Tuned UHF Transmitter for Data Transfer Applications, Rev. 2 20 Freescale Semiconductor
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PLL Tuned UHF Transmitter for Data Transfer Applications, Rev. 2 Freescale Semiconductor 21
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Document Number: MC33493A
Rev. 2 03/2007


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